View MC74VHCT14ADR2_751223.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

MC74VHCT14A Hex Schmitt Inverter
The MC74VHCT14A is an advanced high speed CMOS Schmitt inverter fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation. Pin configuration and function are the same as the MC74VHCT04A, but the inputs have hysteresis and, with its Schmitt trigger function, the VHCT14A can be used as a line receiver which will receive slow input signals. The VHCT inputs are compatible with TTL levels. This device can be used as a level converter for interfacing 3.3 V to 5.0 V, because it has full 5.0 V CMOS level output swings. The VHCT14A input structures provide protection when voltages between 0 V and 5.5 V are applied, regardless of the supply voltage. The output structures also provide protection when VCC = 0 V. These input and output structures help prevent device destruction caused by supply voltage - input/output voltage mismatch, battery backup, hot insertion, etc. The internal circuit is composed of three stages, including a buffer output which provides high noise immunity and stable output. The inputs tolerate voltages up to 7.0 V, allowing the interface of 5.0 V systems to 3.0 V systems.
Features
http://onsemi.com MARKING DIAGRAMS
14 SOIC-14 D SUFFIX CASE 751A 1 14 TSSOP-14 DT SUFFIX CASE 948G 1 14 SOEIAJ-14 M SUFFIX CASE 965 1 74VHCT14 ALYWG VHCT 14A ALYWG G VHCT14AG AWLYWW
1
1
* * * * * * * * * *
High Speed: tPD = 5.5 ns (Typ) at VCC = 5.0 V Low Power Dissipation: ICC = 2.0 mA (Max) at TA = 25C TTL-Compatible Inputs: VIL = 0.8 V; VIH = 2.0 V Power Down Protection Provided on Inputs Balanced Propagation Delays Designed for 2.0 V to 5.5 V Operating Range Low Noise: VOLP = 0.8 V (Max) Pin and Function Compatible with Other Standard Logic Families Chip Complexity: 60 FETs or 15 Equivalent Gates Pb-Free Packages are Available*
1
A = Assembly Location WL, L = Wafer Lot Y, YY = Year WW, W = Work Week G or G = Pb-Free Package (Note: Microdot may be in either location)
FUNCTION TABLE
Inputs A L H Outputs Y H L
ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions section on page 4 of this data sheet.
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
(c) Semiconductor Components Industries, LLC, 2006
1
April, 2006 - Rev. 4
Publication Order Number: MC74VHCT14A/D
MC74VHCT14A
A1 1 2 Y1
A2
3
4
Y2 VCC A6 13 Y6 12 A5 11 Y5 10 A4 9 Y4 8
A3
5
6
Y3 Y=A
14
A4
9
8
Y4
A5
11
10
Y5 1 2 Y1 3 A2 4 Y2 5 A3 6 Y3 7 GND A1 Y6
A6
13
12
Pinout: 14-Lead Packages (Top View)
Figure 1. Logic Diagram
MAXIMUM RATINGS
Parameter DC Supply Voltage DC Input Voltage DC Output Voltage VCC = 0 V DC Input Diode Current DC Output Diode Current DC Output Source/Sink Current DC Supply Current per Supply Pin DC Ground Current per Ground Pin Storage Temperature Range Lead Temperature, 1 mm from Case for 10 Seconds Junction Temperature under Bias Thermal Resistance Power Dissipation in Still Air ESD Withstand Voltage SOIC TSSOP SOIC TSSOP Human Body Model (Note 2) Machine Model (Note 3) Charged Device Model (Note 4) Above VCC and Below GND at 85C (Note 5) Output in HIGH or LOW State (Note 1) Symbol VCC VIN VOUT VOUT IIK IOK IO ICC IGND TSTG TL TJ qJA PD VESD Value -0.5 to +7.0 -0.5 to +7.0 -0.5 to VCC +0.5 V -0.5 to 7.0 -20 $20 $25 $50 $50 -65 to +150 260 +150 125 170 500 450 >2000 >200 2000 $300 Unit V V V V mA mA mA mA mA C C C C/W mW V
Latchup Performance
ILatchup
mA
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. IO absolute maximum rating must be observed. 2. Tested to EIA/JESD22-A114-A. 3. Tested to EIA/JESD22-A115-A. 4. Tested to JESD22-C101-A. 5. Tested to EIA/JESD78.
http://onsemi.com
2
MC74VHCT14A
RECOMMENDED OPERATING CONDITIONS
Parameter Supply Voltage Input Voltage Output Voltage (Note 6) VCC = 0 V Operating Free-Air Temperature 6. IO absolute maximum rating must be observed. Symbol VCC VI VO VO TA Min 4.5 0 0 0 -55 Max 5.5 5.5 VCC 5.5 +125 Unit V V V V C
I II I I I I I I IIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II I II I IIIIIIIIIIIIIIIIIII II II I II I I I II I II I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II IIII I I II I II I I I I II I I I I IIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I I I IIIIII IIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I I II I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II I IIIIIIIIIIIIIIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II I II I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II I II I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II I II I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II I II I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II I II I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II I II I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II I II I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II I II I I I I II I II I I I I IIIIIIIIIIIIIIII IIIIIII I I I II I II I I I I II I II I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIII IIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II I II I I I I I II I II I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I II I II I I I I II I II I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIII IIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II I II I I II I I IIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II I II I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II I II I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II I II I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II I II I I I I I II II I II I I I I I II I II I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II I II I I I I II I II I I I I I IIIIIIIIIIIII III IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIII III IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II I I I I I I I I I II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II I III IIIIIIIIIIIIIII I
Parameter Test Conditions Symbol VT+ VCC V 4.5 5.5 4.5 5.5 4.5 5.5 4.5 5.5 4.5 5.5 5.5 5.5 0.0 TA = 25C Typ TA 85C TA 125C Min Min Max 1.9 2.1 Min Max 1.9 2.1 Max 1.9 2.1 Unit V V V V Positive Threshold Voltage Negative Threshold Voltage Hysteresis Voltage VT- VH 0.5 0.6 0.5 0.6 0.5 0.6 0.40 0.40 4.4 1.40 1.50 0.40 0.40 4.4 1.40 1.50 0.40 0.40 4.4 1.40 1.50 Minimum High-Level Output Voltage IOH = -50 mA VIN = VIH or VIL IOH = -50 mA IOH = -8.0 mA VIN = VIH or VIL IOL = 50 mA IOL = 8.0 mA VOH 4.5 3.94 3.80 3.66 Maximum Low-Level Output Voltage VOL 0.0 0.1 0.1 0.1 V 0.36 0.1 2.0 0.5 0.44 1.0 20 0.52 1.0 40 10 Maximum Input Leakage Current Quiescent Supply Current Output Leakage Current VIN = 5.5 V or GND VIN = VCC or GND Input: VIN = 3.4 V VOUT = 5.5 V IIN 0 to 5.5 mA mA mA Maximum Quiescent Supply Current ICC ICCT IOFF 1.35 1.50 5.0 1.65 mA
DC ELECTRICAL CHARACTERISTICS
AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0 ns)
Parameter Test Conditions
TA = 25C Typ 5.5 7.0 2.0
TA 85C
TA 125C Min 1.0 1.0
Symbol tPLH, tPHL CIN
Min
Max 7.6 9.6 10
Min 1.0 1.0
Max 9.0 11.0 10
Max
Unit ns
Maximum Propagation Delay, A to Y
VCC = 5.0 0.5 V CL = 15 pF CL = 50 pF
11.5 13.5 10
Maximum Input Capacitance
pF
Power Dissipation Capacitance (Note 7)
Typical @ 25C, VCC = 5.0 V 11
CPD
pF
7. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC(OPR) = CPD VCC fin + ICC / 6 (per buffer). CPD is used to determine the no-load dynamic power consumption; PD = CPD VCC2 fin + ICC VCC.
NOISE CHARACTERISTICS (Input tr = tf = 3.0 ns, CL = 50 pF, VCC = 5.0 V)
TA = 25C Characteristic Quiet Output Maximum Dynamic VOL Quiet Output Minimum Dynamic VOL Minimum High Level Dynamic Input Voltage Maximum Low Level Dynamic Input Voltage Symbol VOLP VOLV VIHD VILD Typ 0.8 -0.8 Max 1.0 -1.0 2.0 0.8 Unit V V V V
http://onsemi.com
3
MC74VHCT14A
TEST POINT 3.0V A 1.5V GND tPLH Y 1.5V VOL *Includes all probe and jig capacitance tPHL VOH DEVICE UNDER TEST OUTPUT CL*
Figure 2. Switching Waveforms
Figure 3. Test Circuit
(a) A Schmitt-Trigger Squares Up Inputs With Slow Rise and Fall Times VH Vin VCC VT+ VT- GND VOH Vout VOL Vout Vin VH
(b) A Schmitt-Trigger Offers Maximum Noise Immunity VCC VT+ VT- GND VOH
VOL
Figure 4. Typical Schmitt-Trigger Applications
ORDERING INFORMATION
Device MC74VHCT14ADR2 MC74VHCT14ADR2G MC74VHCT14ADTR2 MC74VHCT14ADTR2G MC74VHCT14AM MC74VHCT14AMG MC74VHCT14AMEL MC74VHCT14AMELG Package SOIC-14 SOIC-14 (Pb-Free) TSSOP-14* TSSOP-14* SOEIAJ-14 SOEIAJ-14 (Pb-Free) SOEIAJ-14* SOEIAJ-14 (Pb-Free) 2000 / Tape & Reel 50 Units / Rail Shipping
2500 / Tape & Reel
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *These packages are inherently Pb-Free.
http://onsemi.com
4
MC74VHCT14A
PACKAGE DIMENSIONS
SOIC-14 D SUFFIX CASE 751A-03 ISSUE G
-A-
14 8 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. MILLIMETERS MIN MAX 8.55 8.75 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0_ 7_ 5.80 6.20 0.25 0.50 INCHES MIN MAX 0.337 0.344 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0_ 7_ 0.228 0.244 0.010 0.019
-B-
P 7 PL 0.25 (0.010)
M
B
M
1
7
G C
R X 45 _
F
-T-
SEATING PLANE
D 14 PL 0.25 (0.010)
K
M
M
S
J
TB
A
S
DIM A B C D F G J K M P R
TSSOP-14 CASE 948G-01 ISSUE A
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE -W-. MILLIMETERS MIN MAX 4.90 5.10 4.30 4.50 --- 1.20 0.05 0.15 0.50 0.75 0.65 BSC 0.50 0.60 0.09 0.20 0.09 0.16 0.19 0.30 0.19 0.25 6.40 BSC 0_ 8_ INCHES MIN MAX 0.193 0.200 0.169 0.177 --- 0.047 0.002 0.006 0.020 0.030 0.026 BSC 0.020 0.024 0.004 0.008 0.004 0.006 0.007 0.012 0.007 0.010 0.252 BSC 0_ 8_
14X K REF
0.10 (0.004) 0.15 (0.006) T U
S
M
TU
S
V
S
N
2X
L/2
14
8
0.25 (0.010) M
L
PIN 1 IDENT. 1 7
B -U-
N F DETAIL E K K1 J J1
0.15 (0.006) T U
S
A -V-
SECTION N-N -W-
C 0.10 (0.004) -T- SEATING
PLANE
D
G
H
DETAIL E
DIM A B C D F G H J J1 K K1 L M
http://onsemi.com
5
EEE CCC EEE CCC
MC74VHCT14A
PACKAGE DIMENSIONS
SOEIAJ-14 CASE 965-01 ISSUE A
14
8
LE Q1 E HE M_ L DETAIL P
1
7
Z D e A VIEW P
c
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS AND ARE MEASURED AT THE PARTING LINE. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 5. THE LEAD WIDTH DIMENSION (b) DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE LEAD WIDTH DIMENSION AT MAXIMUM MATERIAL CONDITION. DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OR THE FOOT. MINIMUM SPACE BETWEEN PROTRUSIONS AND ADJACENT LEAD TO BE 0.46 ( 0.018). DIM A A1 b c D E e HE 0.50 LE M Q1 Z MILLIMETERS MIN MAX --- 2.05 0.05 0.20 0.35 0.50 0.10 0.20 9.90 10.50 5.10 5.45 1.27 BSC 7.40 8.20 0.50 0.85 1.10 1.50 10 _ 0_ 0.70 0.90 --- 1.42 INCHES MIN MAX --- 0.081 0.002 0.008 0.014 0.020 0.004 0.008 0.390 0.413 0.201 0.215 0.050 BSC 0.291 0.323 0.020 0.033 0.043 0.059 10 _ 0_ 0.028 0.035 --- 0.056
b 0.13 (0.005)
M
A1 0.10 (0.004)
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 61312, Phoenix, Arizona 85082-1312 USA Phone: 480-829-7710 or 800-344-3860 Toll Free USA/Canada Fax: 480-829-7709 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 2-9-1 Kamimeguro, Meguro-ku, Tokyo, Japan 153-0051 Phone: 81-3-5773-3850 ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative.
http://onsemi.com
6
MC74VHC14/D

▲Up To Search▲

Price & Availability of MC74VHCT14ADR2

	To Download MC74VHCT14ADR2 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .